eSilicon to present on HBM/2.5D at SemIsrael Expo 2017

 

SAN JOSE, CA, November 22, 2017, (Marketwired):

 

eSilicon, an independent provider of FinFET-class ASIC design, custom IP and advanced 2.5D packaging solutions, will present Enabling the Expanding Cloud: High-Bandwidth Memory and 2.5D Solutions at SemIsrael on November 28, 2017.

 

What:

The next generation of high-performance computing, graphics and networking applications have increasing needs for bandwidth. High-bandwidth memory (HBM) combined with 2.5D technology offers a tremendous increase in capacity and performance. Increased capacity because of the stacked memory in a smaller area and increased performance because of the interposer and shorter signal routing. The interposer allows the integration of highly parallel connections to the memory stacks inside the package, therefore it is able to offer huge capacity and performance increases.

As an ASIC provider for large, complex networking, communication, computing and deep learning systems, we have been analyzing new approaches that would provide more bandwidth for our customers since 2011 and we are now delivering 2.5D ASICs to customers.

 

Who: 

Lisa Minwell, senior director, IP marketing, strategy & products, eSilicon Corporation

 

When:

 
November 28, 2017
11:30-11:50 AM
IP & Cores track

 

Where:

 

Airport City, Israel

 

About SemIsrael

SemIsrael Expo 2017 brings together hundreds of Israeli semiconductor professionals from all fields and aspects of the semiconductor industry. The Expo will host some 1,000 semiconductor professionals from the Israeli semiconductor community: local fabless & startups, local R&D offices of multinationals and IDMs, foundries, design houses, labs and universities.

 

Participation (booth area, technical tracks) is free, but requires early registration and approval. SemIsrael Expo provides free entrance, free lunch and free parking to its guests.

There are four tracks that run in parallel throughout the day:

• IP & Cores
• Front End & Verification
• Physical Design
• Post Silicon

 

In addition, there will be a 50-booth exhibition area where IP, tools and services will be introduced.

 

About eSilicon

eSilicon is an independent provider of complex FinFET-class ASIC design, custom IP and advanced 2.5D packaging solutions. Our ASIC+IP synergies include complete, silicon-proven 2.5D/HBM2 and TCAM platforms for FinFET technology at 14/16nm. 7nm ASICs and IP are in development. Supported by patented knowledge base and optimization technology, eSilicon delivers a transparent, collaborative, flexible customer experience to serve the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets. www.esilicon.com

 

Collaborate. Differentiate. Win.™

 

eSilicon is a registered trademark, and the eSilicon logo and Collaborate. Differentiate. Win. are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.

 

Attachment Available: http://www.marketwire.com/library/MwGo/2017/11/18/11G147946/25d-hbm-timeline-20171103-700pxW_copy_3-351b80b179f09923b871961232659a1c.pdf

 

Contacts: 

Sally Slemons 
eSilicon Corporation 
408-635-6409 
sslemons@esilicon.com
Susan Cain
Cain Communications
408-393-4794
scain@caincom.com

 

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